TSMC announces lithography milestone as EUV moves closer to production
TSMC and ASML have announced a key milestone in extreme ultraviolet lithography (EUV) tech this week at the 2015 SPIE conference (SPIE is an international professional society for photonics and optics). The two companies announced that TSMC has managed to expose more than 1,000 wafers in a 24-hour period using an ASML NXE:3300B EUV system in a single day, with a sustained power of over 90W.
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This breakthrough is important for two reasons. First, a sustained 100W average source power for the EUV laser is considered critical for any commercial production. Manufacturers have been fighting for more than a decade to create a source power at this level. An excellent presentation compiled by lithography expert Chris Mack recently cataloged this struggle (Power Point).
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As this slide from a 2000 Intel presentation shows, EUV was originally expected to debut at 65nm if not before. After Intel’s 157nm efforts fizzled, manufacturers developed tricks like double patterning and immersion lithography to boost the performance of current 193nm Argon Fluoride lasers. Intel signed agreements to acquire its first EUV production equipment in 2002 and expected to ramp from a 50W laser to a 100W source by 2007.
Eight years later, we’re still reaching for that 100W target, but TSMC’s claim of 90W+ sustained is the best that’s been achieved in a commercial system. Exposing 1000 wafers in 24 hours suggests a wafer exposure rate of ~43 wafers per hour — much better than we’ve seen before, but well below the 100-125 wph target for full commercialization of the technology. Currently, it’s expected that EUV would be reserved for a few critical layers of manufacturing rather than used at every stage of the manufacturing process.
The significance (and limitation) of TSMC’s milestone
Hitting 90W sustained average power is a huge achievement in a production system — closer than anyone has publicly come to a production environment, in point of fact — but it’s still just one facet of total production. To use a simplified analogy: Imagine building a conventional Xenon flash for a camera and test-firing it over several thousand cycles. The goal of such a test would be to ensure that the light quality was uniform and that the bulb didn’t suffer from performance degradation after several hundred cycles. What it doesn’ttell us is anything about the quality or composition of the actual photographs.
For now, TSMC is pleased to be moving towards its goal of a sustained 1000 wafers per day of output. It’s planning to install a new brace of NXE:3350B systems to supplement the NXE:3300B systems that are currently installed. Full production use of EUV remains years in the future — this new announcement, while important, doesn’t change the 10nm timeline. Both Intel and TSMC are talking about introducing EUV at sub-10nm process nodes, likely in the 2019 to 2020 timeframe.
Author Joel Hruska
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